Ongoing Projects at MESA
High-Performance, Low-Power Embedded Processors
Wireless information appliances that utilize high-performance, low-power embedded processors will continue to play an increasingly important role in daily living, business, and scientific discovery. In the near future, billions of connected cell phones, embedded processors, hand-held devices, sensors, and actuators will lead to radical new applications in biomedicine, transportation, environmental monitoring, and interpersonal communication and collaboration. Future embedded processors will need to provide advanced functionality and processing power for a wide variety of multimedia, 3D graphics, and wireless security applications. Thus, new design methodologies and tools are needed to give researchers and engineers the ability to quickly explore, evaluate, and design novel algorithms, architectures, microarchitectures, and implementations for emerging applications. learn more ...Scenario-Oriented Architecture Revolution (SOAR)
Scenario Oriented (SO) refers to an emerging category of computing, which requires new metrics and techniques for performance evaluation. The emphasis of SO design is on the integration of heterogeneous tasks onto heterogeneous architectures. SO computers are not strictly embedded, since they are intended to execute a variety of post-design time programs, not all with real-time constraints. However, SO computers are not generally programmable, unlike the consumer-oriented computers of the past 30 years. Rather, programs for SO computes must "fit the device" for which they are designed– for example the addition of speech recognition on a cell phone must fit with the other applications, and could detract from their performance or necessitate less sophisticated algorithms. The challenges of SO computing are not addressed by conventional embedded, uniprocessor, or multi-processor research. learn more ...Processor Support for Decimal Floating-Point Arithmetic
In many commercial applications, including financial analysis, banking, tax calculation, currency conversions, insurance, accounting, and e-commerce, the errors introduced by converting between decimal and binary numbers are unacceptable and may violate legal accuracy requirements. Therefore, these applications often use software to perform decimal floating-point arithmetic. Although this approach eliminates errors due to converting between binary and decimal numbers, it leads to long execution times for numerically intensive commercial applications, since software implementations of decimal floating-point operation are typically 100 to 1,000 times slower than equivalent binary floating-point operations in hardware. learn more ...4D Cluster Medical Imaging and Visualization
The goal of the 4D Cluster Visualization Project is to develop hardware and software for interactive imaging and visualization of high-resolution time-resolved 3D medical images. Research objectives include (1) developing new techniques for medical imaging and visualization using clusters of computers and graphics processing units (2) developing a comprehensive framework for 4D cluster visualization, (3) investigating techniques for efficient compression of 4D data sets, and (4) designing hardware accelerators to faciliate computationally intensive tasks.
learn more ...Adaptive Mixed-Signal Embedded System Design for the Spallation Neutron Source
The goal of this research is to design and implement high-performance, embedded systems for real-time data collection, monitoring, and control of the Spallation Neutron Source, which is the world's most intense pulsed accelerator-based neutron source. One of the project's key objectives is the design and implementation of the world’s first mixed-signal feedback damper system for monitoring and controlling electron-proton instabilities in a pulsed neutron source. The second key objective is to design and implement a mixed-signal current measurement and control system for the Spallation Neutron Source. Both projects utilize high-speed analog-to-digital and digital-to-analog converters, embedded processors, and field programmable gates arrays (FPGAs). learn more ...A Benchmark Suite for Embedded and Reconfigurable Computing
For this project, we are researching benchmark suites for embedded and reconfigurable computing that combine software running on embedded processors and hardware implemented using FPGAs. The goal of this project is to come up with a publicly available benchmark suite that can be used to estimate the efficiency of various embedded and reconfigurable computing systems. learn more ...
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Madison Embedded Systems and Architectures Lab ,
Department of Electrical and Computer Engineering , University of Wisconsin-Madison,
3632 Engineering Hall, 1415 Engineering Drive,
Madison, WI 53706. Phone: (608) 262 0940.
Last Revised: November 06, 2004. © 2004 MESA.